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TFDU6102
Vishay Semiconductors
Fast Infrared Transceiver Module (FIR, 4 Mbit/s) for 2.7 V to 5.5 V Operation
Description
The TFDU6102 is a low-power infrared transceiver module compliant to the latest IrDA physical layer standard for fast infrared data communication, supporting IrDA speeds up to 4.0 Mbit/s (FIR), and carrier based remote control modes up to 2 MHz. Integrated within the transceiver module are a PIN photodiode, an infrared emitter (IRED), and a low-power CMOS control IC to provide a total front-end solution in a single package. Vishay FIR transceivers are available in different package options, including this BabyFace package (TFDU6102). This wide selection provides flexibility for a variety of applications and space constraints. The transceivers are capable of directly interfacing with a wide variety of I/O devices which perform the
18102
modulation/ demodulation function, including National Semiconductor's PC87338, PC87108 and PC87109, SMC's FDC37C669, FDC37N769 and CAM35C44, and Hitachi's SH3. TFDU6102 has a tristate output and is floating in shut-down mode with a weak pull-up.
Features
* Supply voltage 2.7 V to 5.5 V, operating idle current (receive mode) < 3 mA, shutdown current < 5 A over full e3 temperature range * Surface mount package, top and side view, 9.7 mm x 4.7 mm x 4.0 mm * Operating temperature - 25 C to 85 C * Storage temperature - 40 C to 100 C * Transmitter wavelength typ. 886 nm, supporting IrDA(R) and Remote Control * IrDA(R) compliant, link distance > 1 m, 15 , window losses are allowed to still be inside the IrDA(R) spec. * Remote Control range > 8 m, typ. 22 m * ESD > 4000 V (HBM), latchup > 200 mA * EMI immunity > 550 V/m for GSM frequency and other mobile telephone bands / (700 MHz to 2000 MHz, no external shield) * Split power supply, LED can be driven by a separate power supply not loading the regulated supply. U.S. Pat. No. 6,157,476 * Tri-state-Receiver Output, floating in shut down with a weak pull-up * Eye safety class 1 (IEC60825-1, ed. 2001), limited LED on-time, LED current is controlled, no single fault to be considered * Lead (Pb)-free device * Device in accordance to RoHS 2002/95/EC and WEEE 2002/96EC
Applications
* Notebook computers, desktop PCs, Palmtop computers (Win CE, Palm PC), PDAs * Digital still and video cameras * Printers, fax machines, photocopiers, screen projectors * Telecommunication products (cellular phones, pagers) * Internet TV Boxes, video conferencing systems * External infrared adapters (dongles) * Medical an industrial data collection
Document Number 82550 Rev. 1.6, 05-Dec-05 www.vishay.com 1
TFDU6102
Vishay Semiconductors Parts Table
Part TFDU6102-TR3 TFDU6102-TT3 Description Oriented in carrier tape for side view surface mounting Oriented in carrier tape for top view surface mounting 1000 pcs 1000 pcs Qty / Reel
Functional Block Diagram
Vcc1 Tri-State Driver Amplifier Comparator Vcc2
RXD
SD TXD
18468
Logic &
Control
Controlled Driver IRED C
GND
Pinout
TFDU6102 weight 200 mg
Definitions:
In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes: SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhy 1.0 MIR: 576 kbit/s to 1152 kbit/s FIR: 4 Mbit/s VFIR: 16 Mbit/s
IRED Detector
"U" Option BabyFace (Universal)
MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy 1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the Low Power Option to MIR and FIR and VFIR was added with IrPhy 1.4.A new version of the standard in any case obsoletes the former version.
1
17087
2 34 56
78
Note: We apologize to use sometimes in our documentation the abbreviation LED and the word Light Emitting Diode instead of Infrared Emitting Diode (IRED) for IR-emitters. That is by definition wrong; we are here following just a bad trend. Typical values are for design aid only, not guaranteed nor subject to production testing and may vary with time.
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors
Pin Description
Pin Number "U" 1 Function VCC2 IRED Anode Description Connect IRED anode directly to VCC2. For voltages higher than 3.6 V an external resistor might be necessary for reducing the internal power dissipation. An unregulated separate power supply can be used at this pin. IRED cathode, internally connected to driver transistor This input is used to transmit serial data when SD is low. An on-chip protection circuit disables the LED driver if the TXD pin is asserted for longer than 80 s. When used in conjunction with the SD pin, this pin is also used to receiver speed mode. Received Data Output, push-pull CMOS driver output capable of driving a standard CMOS or TTL load. No external pull-up or pull-down resistor is required. Floating with a weak pull-up of 500 k (typ.) in shutdown mode. Shutdown, also used for dynamic mode switching. Setting this pin active places the module into shutdown mode. On the falling edge of this signal, the state of the TXD pin is sampled and used to set receiver low bandwidth (TXD = Low, SIR) or high bandwidth (TXD = High, MIR and FIR) mode. Will be overwritten by the mode pin input, which must float, when dynamic programming is used. Supply Voltage HIGH: High speed mode, MIR and FIR; LOW: Low speed mode, SIR only (see chapter "Mode Switching"). Must float, when dynamic programming is used. The mode pin can also be used to indicate the dynamically programmed mode. The maximum load is limited to 50 pF. High indicates FIR/MIR-, low indicates SIR-mode Ground I I HIGH I/O Active
2 3
IRED Cathode TXD
4
RXD
O
LOW
5
SD
I
HIGH
6 7
VCC1 Mode
Mode
O
8
GND
Document Number 82550 Rev. 1.6, 05-Dec-05
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TFDU6102
Vishay Semiconductors
Absolute Maximum Ratings
Reference point Ground Pin 8, unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage range, transceiver Supply voltage range, transmitter Input currents Output sinking current Power dissipation Junction temperature Ambient temperature range (operating) Storage temperature range Soldering temperature Average output current Repetitive pulse output current IRED anode voltage Voltage at all inputs and outputs Vin > VCC1 is allowed Load at mode pin when used as mode indicator < 90 s, ton < 20 % see recommended solder profile (see figure 4) IIRED (DC) IIRED (RP) VIREDA VIN - 0.5 see derating curve, figure 5 PD TJ Tamb Tstg - 25 - 25 Test Conditions 0 V < VCC2 < 6 V 0 V < VCC1 < 6 V for all pins, except IRED anode pin Symbol VCC1 VCC2 Min - 0.5 - 0.5 Typ. Max +6 + 6.5 10 25 500 125 + 85 + 85 260 125 600 + 6.5 5.5 50 Unit V V mA mA mW C C C C mA mA V V pF
Eye safety information
Reference point Pin: GND unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Virtual source size Maximum Intensity for Class 1 Test Conditions Method: (1 - 1/e) encircled energy IEC60825-1 or EN60825-1, edition Jan. 2001 Symbol d Ie Min 2.5 Typ. 2.8
*)
Max
Unit mm
(500)**)
mW/sr
*)
Due to the internal limitation measures the device is a "class1" device IrDA specifies the max. intensity with 500 mW/sr
**)
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors Electrical Characteristics Transceiver
Tamb = 25 C, VCC = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage Supply current (Idle)
1)
Test Conditions SD = Low, Ee = 0 klx SD = Low, Ee = 1 klx2) SD = High, Mode = Floating Ee = 0 klx SD = High, Mode = Floating Ee = 1 klx2) SD = High, T = 85 C, Mode = Floating, not ambient light sensitive
Symbol VCC ICC ICC ISD ISD ISD
Min 2.7
Typ. 2 2
Max 5.5 3 3 2.0 2.5 5
Unit V mA mA A A A
Supply current (Idle)1) Shutdown supply current
Operating temperature range Output voltage low Output voltage high Output RXD current limitation high state Output RXD current limitation low state RXD to VCC1 impedance Input voltage low (TXD, SD, Mode) Input voltage high (TXD, SD, Mode) Input leakage current (TXD, SD) Input leakage current Mode Input capacitance (TXD, SD, Mode) CMOS level 3) TTL level, VCC1 = 4.5 V IOL = 1 mA, Cload = 15 pF IOH = 500 A, Cload = 15 pF IOH = 250 A, Cload = 15 pF Short to Ground Short to VCC1 SD = High
TA VOL VOH VOH
- 25 0.8 x VCC 0.9 x VCC
+ 85 0.4
C V V V
20 20 RRXD VIL VIH VIH IL IICH CIN 400 - 0.5 VCC - 0.5 2.4 - 10 -2 + 10 +2 5 500 600 0.5 VCC + 0.5
mA mA k V V V A A pF
1) Receive mode only. In transmit mode, add additional 85 mA (typ) for IRED current. Add RXD output current depending on RXD load. 2) 3)
Standard Illuminant A
The typical threshold level is between 0.5 x VCC2 (VCC = 3 V) and 0.4 x VCC (VCC = 5.5 V) . It is recommended to use the specified min/ max values to avoid increased operating current.
Document Number 82550 Rev. 1.6, 05-Dec-05
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TFDU6102
Vishay Semiconductors Optoelectronic Characteristics Receiver
Tamb = 25 C, VCC = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Minimum irradiance Ee in angular range **) SIR mode Minimum irradiance Ee in angular range, MIR mode Minimum irradiance Ee inangular range, FIR mode Maximum irradiance Ee in angular range ***) Maximum no detection irradiance Rise time of output signal Fall time of output signal RXD pulse width of output signal, 50 %, SIR mode Test Conditions 9.6 kbit/s to 115.2 kbit/s = 850 nm to 900 nm 1.152 Mbit/s = 850 nm to 900 nm 4.0 Mbit/s = 850 nm to 900 nm = 850 nm to 900 nm Symbol Ee Ee Ee Ee Ee tr (RXD) tf (RXD) tPW tPW 1.5 4 (0.4) 10 10 2.1 1.8 2.6 40 40 Min Typ. 25 (2.5) 65 (6.5) 80 (8.0) 5 (500) 90 (9.0) Max 35 (3.5) Unit mW/m2 (W/cm2) mW/m2 (W/cm2) mW/m2 (W/cm2) kW/m2 (mW/cm2) mW/m2 (W/cm2) ns ns s s
*)
10 % to 90 %, 15 pF 90 % to 10 %, 15 pF input pulse length 1.4 s < PWopt < 25 s input pulse length 1.4 s < PWopt < 25 s, - 25 C < T < 85 C ****)
RXD pulse width of output signal, 50 %, MIR mode RXD pulse width of output signal, 50 %, FIR mode
input pulse length PWopt = 217 ns, 1.152 Mbit/s input pulse length PWopt = 125 ns, 4.0 Mbit/s input pulse length PWopt = 250 ns, 4.0 Mbit/s
tPW
110
250
270
ns
tPW
100
140
ns
tPW
225
275
ns
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors Receiver continued
Tamb = 25 C, VCC = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Stochastic jitter, leading edge input irradiance = 100 mW/m2, 4.0 Mbit/s input irradiance = 100 mW/m2, 1.152 Mbit/s input irradiance = 100 mW/m2, 576 kbit/s input irradiance = 100 mW/m2, 115.2 kbit/s after completion of shutdown programming sequence Power on delay tL 170 20 40 80 350 500 ns ns ns ns s
Receiver start up time
Latency
300
s
Note: All timing data measured with 4 Mbit/s are measured using the IrDA(R) FIR transmission header. The data given here are valid 5 s after starting the preamble.
*) This parameter reflects the backlight test of the IrDA physical layer specification to guarantee immunity against light from fluorescent lamps **)
IrDA sensitivity definition: Minimum Irradiance Ee In Angular Range, power per unit area. The receiver must meet the BER specification while the source is operating at the minimum intensity in angular range into the minimum half-angle range at the maximum Link Length
***) Maximum Irradiance Ee In Angular Range, power per unit area. The optical delivered to the detector by a source operating at the maximum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible related link errors. If placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER). For more definitions see the document "Symbols and Terminology" on the Vishay Website (http://www.vishay.com/docs/82512/82512.pdf). ****)
Retriggering once during applied optical pulse may occur
Document Number 82550 Rev. 1.6, 05-Dec-05
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TFDU6102
Vishay Semiconductors Transmitter
Tamb = 25 C, VCC = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter IRED operating current, switched current limiter Test Conditions See derating curve (fig. 5). For 3.3 V operations no external resistor needed. For 5 V application that might be necessary depending on operating temperature range. = 0 , 15 TXD = High, SD = Low, VCC1 = VCC2 = 3.3 V Internally current-controlled, no external resistor VCC1 = 5.0 V, = 0 , 15 TXD = Low or SD = High, (Receiver is inactive as long as SD = High) Symbol ID Min 500 Typ. 550 Max 600 Unit mA
Output leakage IRED current Output radiant intensity recommended application circuit
IIRED Ie
-1 120 170
1 350
A mW/sr
Output radiant intensity
Ie
0.04
mW/sr
Output radiant intensity, angle of half intensity Peak - emission wavelength Spectral bandwidth Optical rise time, fall time Optical output pulse duration input pulse width 217 ns, 1.152 Mbit/s input pulse width 125 ns, 4.0 Mbit/s input pulse width 250 ns, 4.0 Mbit/s input pulse width 0.1 s < tTXD < 100 s *) input pulse width tTXD 100 s *) Optical overshoot
*)
p tropt, tfopt topt topt topt topt topt 23 10 207 117 242 880
24 900 40 40 217 125 250 tTXD 100 25 227 133 258
nm nm ns ns ns ns s s %
Typically the output pulse duration will follow the input pulse duration t and will be identical in length t. However, at pulse duration larger than 100 s the optical output pulse duration is limited to 100 s. This pulse duration limitation can already start at 23 s
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors Recommended Circuit Diagram
Vishay Semiconductors transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long, resistive and inductive wiring should be avoided. The inputs (TXD, SD, Mode) and the output RXD should be directly (DC) coupled to the I/O circuit. higher operating voltages and elevated temperatures, see derating curve in figure 5, to avoid too high internal power dissipation. The capacitors C2 and C3 combined with the resistor R2 (as the low pass filter) is smoothing the supply voltage VCC1. R2, C1, C2, and C3 are optional and dependent on the quality of the supply voltages VCC1 and VCC2 and injected noise. An unstable power supply with dropping voltage during transmission may reduce sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 and C3 as close as possible to the transceiver power supply pins. An Tantalum capacitor should be used for C1 and C3 while a ceramic capacitor is used for C2. In addition, when connecting the described circuit to the power supply, low impedance wiring should be used. When extended wiring is used the inductance of the power supply can cause dynamically a voltage drop at VCC2. Often some power supplies are not apply to follow the fast current is rise time. In that case another 4.7 F (type, see table under C1) at VCC2 will be helpful. Keep in mind that basic RF-design rules for circuit design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. "The Art of Electronics" Paul Horowitz, Wienfield Hill, 1989, Cambridge University Press, ISBN: 0521370957.
Vcc2 Vcc1 GND Mode SD TXD RXD R2 C1
R1 C3 C2
IRED Anode Vcc Ground Mode SD TXD RXD IRED Cathode
18469
Figure 1. Recommended Application Circuit
The capacitor C1 is buffering the supply voltage and reduces the influence of the inductance of the power supply line. This one should be a Tantalum or other fast capacitor to guarantee the fast rise time of the IRED current. The resistor R1 is only necessary for
Table 1. Recommended Application Circuit Components
Component C1, C3 C2 R1 Recommended Value 4.7 F, 16 V 0.1 F, Ceramic 5 V supply voltage: 2 , 0.25 W ( recommended using two 1 , 0.125 W resistor in series) 3.3 V supply voltage: no resistors necessary, the internal controller is able to control the current 47 , 0.125 W Vishay Part Number 293D 475X9 016B VJ 1206 Y 104 J XXMT e.g. 2 x CRCW-1206-1R0-F-RT1
R2
CRCW-1206-47R0-F-RT1
Document Number 82550 Rev. 1.6, 05-Dec-05
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TFDU6102
Vishay Semiconductors I/O and Software
In the description, already different I/Os are mentioned. Different combinations are tested and the function verified with the special drivers available from the I/O suppliers. In special cases refer to the I/ O manual, the Vishay application notes, or contact directly Vishay Sales, Marketing or Application. After that TXD is enabled as normal TXD input and the transceiver is set for the high bandwidth (576 kbit/ s to 4 Mbit/s) mode.
Setting to the Lower Bandwidth Mode (2.4 kbit/s to 115.2 kbit/s)
1. Set SD input to logic "HIGH". 2. Set TXD input to logic "LOW". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of TXD, which determines speed setting). 4. TXD must be held for th 200 ns. After that TXD is enabled as normal TXD input and the transceiver is set for the lower bandwidth (9.6 kbit/ s to 115.2 kbit/s) mode.
Mode Switching
The TFDU6102 is in the SIR mode after power on as a default mode, therefore the FIR data transfer rate has to be set by a programming sequence using the TXD and SD inputs as described below or selected by setting the Mode Pin. The Mode Pin can be used to statically set the mode (Mode Pin: LOW: SIR, HIGH: 0.576 Mbit/s to 4.0 Mbit/s). If not used or in standby mode, the mode input should float or should not be loaded with more than 50 pF. The low frequency mode covers speeds up to 115.2 kbit/s. Signals with higher data rates should be detected in the high frequency mode. Lower frequency data can also be received in the high frequency mode but with reduced sensitivity. To switch the transceivers from low frequency mode to the high frequency mode and vice versa, the programming sequences described below are required.
SD
50 %
ts TXD 50 %
th High : FIR 50 % Low : SIR
Setting to the High Bandwidth Mode (0.576 Mbit/s to 4.0 Mbit/s)
1. Set SD input to logic "HIGH". 2. Set TXD input to logic "HIGH". Wait ts 200 ns. 3. Set SD to logic "LOW" (this negative edge latches state of TXD, which determines speed setting). 4. After waiting th 200 ns TXD can be set to logic "LOW". The hold time of TXD is limited by the maximum allowed pulse length.
Figure 2. Mode Switching Timing Diagram
14873
Table 2. Truth table
Inputs SD high low TXD x high high > 80 s low low low Optical input Irradiance mW/m2 x x x <4 > Min. irradianceEe < Max. irradiance Ee > Max. irradiance Ee RXD weakly pulled (500 k) to VCC1 low (active) high high low (active) x Outputs Transmitter 0 Ie 0 0 0 0
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors
Recommended Solder Profile
Solder Profile for Sn/Pb soldering
260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 50 100 150 200 250 300 350 19431_1
240 C max.
10 s max. at 230 C
2...4 C/s 160 C max. 120 s...180 s 2...4 C/s
90 s max.
Time/s
Figure 3. Recommended Solder Profile for Sn/Pb soldering
Lead-Free, Recommended Solder Profile The lead-frame based transceivers (all types with the name TFDUxxxx) are lead (Pb)-free and qualified for lead (Pb)-free and lead - bearing processing. In case of using a lead-bearing process we recommend a solder profile as shown in figure 4. For lead (Pb)-free solder paste like Sn-(3.0-4.0)Ag(0.5-0.9)Cu, there are two standard reflow profiles: Ramp-Soak-Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-Soak-Spike profile was developed primarily for reflow ovens heated by infrared radiation. With widespread use of forced convection reflow ovens the Ramp-To-Spike profile is used increasingly. Shown below in figure 5 and figure 6 are VISHAY's recommende profiles for use with the TFDUxxxx transceivers for lead (Pb)-free processing.
Temperature/C
280 260 240 220 200 180 T 217 C for 50 s max T 255 C for 20 s max T peak = 260 C max.
Temperature/C
160 140 120 100 80 60 40 20 0 0
19261
20 s
90 s...120 s
50 s max.
2 C...4 C/s
2 C...4 C/s
50
100
150 Time/s
200
250
300
350
Figure 4. Solder Profile, RSS Recommendation
Document Number 82550 Rev. 1.6, 05-Dec-05
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TFDU6102
Vishay Semiconductors
280 260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 50
Tpeak = 260 C max
Temperature/C
< 4 C/s 1.3 C/s
Time above 217 C t 70 s Time above 250 C t 40 s Peak temperature Tpeak = 260 C
<2 C/s
100
150 Time/s
200
250
300
Figure 5. RTS Recommendation
A ramp-up rate less than 0.9 C/s is not recommended. Ramp-up rates faster than 1.3 C/s could damage an optical part because the thermal conductivity is less than compared to a standard IC.
Current Derating Diagram
Figure 5 shows the maximum operating temperature when the device is operated without external current limiting resistor. A power dissipating resistor of 2 is recommended from the cathode of the IRED to Ground for supply voltages above 4 V. In that case the device can be operated up to 85 C, too.
90 85 Ambient Temperature (C) 80 75 70 65 60 55 50 2.0
18097
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Operating Voltage [V] at duty cycle 20 %
Figure 6. Temperature Derating Diagram
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors Package Dimensions
7x1=7 0.6
2.5 1 1 8
18470
Figure 7. Package drawing and solder footprint TFDU6102, dimensions in mm, tolerance 0.2 mm if not otherwise mentioned
Document Number 82550 Rev. 1.6, 05-Dec-05
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TFDU6102
Vishay Semiconductors Reel Dimensions
14017
Tape Width mm 24
A max. mm 330
N mm 60
W1 min. mm 24.4
W2 max. mm 30.4
W3 min. mm 23.9
W3 max. mm 27.4
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors Tape Dimensions
19824
Drawing-No.: 9.700-5251.01-4 Issue: 3; 02.09.05 Figure 8. Tape drawing, TFDU6102 for top view mounting, tolerance 0.1 mm
Document Number 82550 Rev. 1.6, 05-Dec-05
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TFDU6102
Vishay Semiconductors
19875
Drawing-No.: 9.700-5297.01-4 Issue: 1; 04.08.05 Figure 9. Tape drawing, TFDU6102 for side view mounting, tolerance 0.1 mm
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Document Number 82550 Rev. 1.6, 05-Dec-05
TFDU6102
Vishay Semiconductors Ozone Depleting Substances Policy Statement
It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Document Number 82550 Rev. 1.6, 05-Dec-05
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Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Vishay for any damages resulting from such improper use or sale.
Document Number: 91000 Revision: 08-Apr-05
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